- Voltage derating — primarily to counteract severe capacitance loss (voltage coefficient of capacitance, or VCC) in Class II dielectrics and to improve long-term reliability.
- Temperature derating — to stay within the guaranteed capacitance stability limits of the EIA temperature characteristic (e.g., X5R, X7R) and to prevent accelerated aging or reduced lifetime.
Derating is far more critical for Class II (X5R, X7R, etc.) than for Class I (C0G/NP0), which shows negligible voltage or temperature effects.
## 1. Voltage Derating Practice
Class II MLCCs can lose 30–90% of their nominal capacitance when operated near rated voltage due to the ferroelectric nature of the dielectric. The loss is nonlinear and worse in smaller case sizes and higher-capacitance parts.Industry-standard guidelines:
- Most common rule of thumb: Apply 50% voltage derating (use the MLCC at ≤ 50% of its rated voltage).
This is widely recommended for general electronics, power decoupling, and any application where stable effective capacitance matters.
Example: For a 5 V rail, choose at least a 10 V rated MLCC (or higher).
- Conservative / high-reliability designs (automotive, aerospace, medical, servers):
- 50% or greater derating (sometimes 60–70%).
- NASA/NEPP guidelines for BME Class II MLCCs ≤ 100 V suggest a 0.5 derating factor (50%).
- Minimum derating: Some sources suggest at least 25–30% derating (operate at ≤ 70–75% of rated voltage), but this is generally considered insufficient for Class II parts because capacitance drop remains significant.
- For AC + DC combined (e.g., ripple on a DC rail): Derate so that peak voltage (DC + AC peak) ≤ 50% of rated voltage.
- Class I (C0G/NP0): Voltage derating is not required for capacitance stability (almost zero VCC). A mild 25% derating may still be applied for reliability or safety margins in high-voltage applications.
Manufacturer stance: Some (e.g., older TDK guidance) state that MLCCs do not need derating for reliability because they pass life tests at 2× rated voltage. However, practical derating is still mandatory due to capacitance loss, not breakdown risk.
Always consult the manufacturer’s DC bias curves (available on Murata SimSurfing, TDK, Samsung, etc.) — the actual capacitance at your operating voltage can vary significantly even among same-spec parts.
## 2. Temperature Derating Practice
Temperature affects both capacitance stability and long-term reliability.- Within the rated temperature range (defined by the EIA code):
- X7R: –55°C to +125°C with ΔC ≤ ±15% (zero bias).
- X5R: –55°C to +85°C with ΔC ≤ ±15%.
- X8R: –55°C to +150°C.
Designers must still account for the combined effect of temperature + DC bias + aging, which can cause far greater total capacitance variation than the ±15% spec alone.
- Above the upper rated temperature:
- Apply voltage derating in addition to staying below the absolute max.
- Example (Murata-style derating curves): When product temperature exceeds 105°C or 125°C, reduce applied voltage significantly (often to 50% or lower, depending on the part).
- For automotive/high-temp parts, manufacturers provide specific derating tables or graphs.
- Practical temperature selection rules:
- Use X7R (or better) instead of X5R when operating above ~80–85°C.
- For ambient >125°C, select X8R or specialized high-temperature MLCCs and apply additional voltage derating.
- In power circuits near hot components (CPUs, GPUs, power devices), consider self-heating from ripple current.
- Aging interaction: Class II MLCCs lose capacitance logarithmically over time (typically ~2–3% per decade-hour for X7R after soldering resets the clock). Higher temperatures accelerate this effect.
## Combined Voltage + Temperature Derating
In real designs, engineers evaluate the worst-case effective capacitance under simultaneous:- DC bias (at operating voltage)
- Temperature (max ambient + self-heating)
- Aging (after 1000+ hours)
Typical conservative approach for Class II MLCCs in decoupling/PDN:
- Select a part rated 2× the DC voltage.
- Choose dielectric with sufficient temperature range (X7R preferred over X5R).
- Verify with manufacturer curves or simulation that effective C remains adequate (often only 40–70% of nominal remains).
- For critical rails, oversize nominal capacitance or use more parts in parallel.
## Additional Notes
- Ripple current: In switching applications, also derate ripple current (typically to 75% of manufacturer limit) and keep frequency away from mechanical resonance to avoid acoustic noise or cracking.- Automotive (AEC-Q200): Follow supplier-specific derating guides; many require voltage reduction above 125°C or 150°C.
- High-voltage MLCCs (>100 V): Derating practices are often milder, but still recommended.
Summary of Typical Derating:
| Application Type | Voltage Derating (Class II) | Temperature Approach | Notes |
|---------------------------|-----------------------------|-----------------------------------------------|-------|
| General / Consumer | 50% (2× rating) | Stay within rated range; prefer X7R | Most common practice |
| Power Integrity / Decoupling | 50–60% | Account for self-heating; verify combined effects | Critical for CPUs/GPUs |
| Automotive / High-Reliability | ≥50% (often more at high temp) | Use X7R/X8R + supplier derating curves | AEC-Q200 qualified parts |
| Class I (C0G) | 0–25% (optional) | Negligible effect | Stability-focused |
In practice, always:
1. Review the specific part’s DC bias vs. temperature curves.
2. Perform PDN or circuit simulation with realistic derated values.
3. Validate prototypes under worst-case temperature, voltage, and aging conditions.
Proper derating ensures reliable capacitance, prevents excessive voltage stress, and helps MLCCs deliver consistent performance across the product’s lifetime.
icDirectory Limited | https://www.icdirectory.com/a/blog/what-is-the-typical-derating-practice-for-voltage-and-temperature-in-mlcc-applications.html
